File "OEMINI.ROM"
File size: 15.86 KB
Charset: utf-8
#nvsuoem.ini_begin - Begin signature. Required.
REM nTune setting file
[C72M55XECRB]
REM voltage setting
cpu_min = 800000
cpu_max = 1850000
cpu_increment_step=6250
mem_min = 1800000
mem_max = 2500000
mem_increment_step=25000
core_min = 1500000
core_max = 1750000
core_increment_step=25000
agp_min = 1200000
agp_max = 1550000
agp_increment_step=50000
htcpuspp_min=1200000
htcpuspp_max=1500000
htcpuspp_increment_step=100000
htsppmcp_min=1200000
htsppmcp_max=1550000
htsppmcp_increment_step=50000
aux_min = 1500000
aux_max = 1800000
aux_increment_step=100000
REM GTLVREF setting
cpuvref_max=160000
cpuvref_min=000000
cpuvref_increment_step=5000
cpufsb_max=1200000
cpufsb_min=1500000
cpufsb_increment_step=100000
REM dimm address info
NumberOfDimm=4
Dimm0Smbus =0x50
Dimm0Slot=0
Dimm0SmbusSeg=0
Dimm1Smbus =0x51
Dimm1Slot=1
Dimm1SmbusSeg=0
Dimm2Smbus =0x52
Dimm2Slot=2
Dimm2SmbusSeg=0
Dimm3Smbus =0x53
Dimm3Slot=3
Dimm3SmbusSeg=0
TitleText=1
REM Advance page info/CMOS location
AdvanceView=1
CmosVersion=1
REM Voltage and Fan control page
VoltageView=1
FanView=1
Aux2FanLabel=nForce MCP
REM Flash BIOS enable/disable flag
BiosFlashEnable=1
REM Flash Bios blocked address range.
BlockAddressRange=0
BlockStartAddress0=0
BlockEndAddress0=FFFF
BlockStartAddress1=20000
BlockEndAddress1=2FFFF
BlockStartAddress2=30000
BlockEndAddress2=30FFF
REM To show/hide the restore defaults button for 6.2 forward NVPerformance
EnableDBARestoreDefaults=1
TotalTab=3
REM Tab 0
T0Name=Advanced Chipset Features I
T0GroupNo=4
REM T0Group 0
T0Group0Name=System Clocks I
T0G0CmosFieldNo=6
T0G0Cmos0Name=CPU Multiplier
T0G0Cmos0Value=0x |1x |2x |3x |4x |5x |6x |7x |8x |9x |10x|11x|12x|13x|14x|15x|16x|17x|18x|19x|20x|21x|22x|23x|24x|25x|26x|27x|28x|N/A
T0G0Cmos0Location=0xA0
T0G0Cmos0BitMask=0xFF
T0G0Cmos0DefaultValue=0x00000000
T0G0Cmos1Name=PCIe x16_3, MHz
T0G0Cmos1Value=Auto|100|101|102|103|104|105|106|107|108|109|110|
T0G0Cmos1Value0=111|112|113|114|115|116|117|118|119|120|
T0G0Cmos1Value1=121|122|123|124|125|126|127|128|129|130|
T0G0Cmos1Value2=131|132|133|134|135|136|137|138|139|140|
T0G0Cmos1Value3=141|142|143|144|145|146|147|148|149|150|
T0G0Cmos1Value4=151|152|153|154|155|156|157|158|159|160|
T0G0Cmos1Value5=161|162|163|164|165|166|167|168|169|170|
T0G0Cmos1Value6=171|172|173|174|175|176|177|178|179|180|
T0G0Cmos1Value7=181|182|183|184|185|186|187|188|189|190|
T0G0Cmos1Value8=191|192|193|194|195|196|197|198|199|200
T0G0Cmos1Location=0xB4
T0G0Cmos1BitMask=0x7F
T0G0Cmos1DefaultValue=0x00000000
T0G0Cmos2Name=SPP<->MCP Ref Clock, MHz
T0G0Cmos2Value=Auto|200.0|200.5|201.0|201.5|202.0|202.5|203.0|203.5|
T0G0Cmos2Value0=204.0|204.5|205.0|205.5|206.0|206.5|207.0|207.5|208.0|
T0G0Cmos2Value1=208.5|209.0|209.5|210.0|211.0|212.0|213.0|214.0|215.0|
T0G0Cmos2Value2=216.0|217.0|218.0|219.0|220.0|221.0|222.0|223.0|224.0|
T0G0Cmos2Value3=225.0|226.0|227.0|228.0|229.0|230.0|232.0|234.0|236.0|
T0G0Cmos2Value4=238.0|240.0|242.0|244.0|246.0|248.0|250.0|252.0|254.0|
T0G0Cmos2Value5=256.0|258.0|260.0|262.0|264.0|266.0|268.0|270.0|272.0|
T0G0Cmos2Value6=274.0|276.0|278.0|280.0|282.0|284.0|286.0|288.0|290.0|
T0G0Cmos2Value7=292.0|294.0|296.0|298.0|300.0|302.0|304.0|306.0|308.0|
T0G0Cmos2Value8=310.0|312.0|314.0|316.0|318.0|320.0|322.0|324.0|326.0|
T0G0Cmos2Value9=328.0|330.0|332.0|334.0|336.0|338.0|340.0|342.0|344.0|
T0G0Cmos2Value10=346.0|348.0|350.0|352.0|354.0|356.0|358.0|360.0|362.0|
T0G0Cmos2Value11=364.0|366.0|368.0|370.0|372.0|374.0|376.0|378.0|380.0|
T0G0Cmos2Value12=382.0|384.0|386.0|388.0|390.0|392.0|394.0|396.0|398.0|
T0G0Cmos2Value13=400.0|402.0|404.0|406.0|408.0|410.0|412.0|414.0|416.0|
T0G0Cmos2Value14=418.0|420.0|422.0|424.0|426.0|428.0|430.0|432.0|434.0|
T0G0Cmos2Value15=436.0|438.0|440.0|442.0|444.0|446.0|448.0|450.0|452.0|
T0G0Cmos2Value16=454.0|456.0|458.0|460.0|462.0|464.0|466.0|468.0|470.0|
T0G0Cmos2Value17=472.0|474.0|476.0|478.0|480.0|482.0|484.0|486.0|488.0|
T0G0Cmos2Value18=490.0|492.0|494.0|496.0|498.0|500.0
T0G0Cmos2Location=0x62
T0G0Cmos2BitMask=0xFF
T0G0Cmos2DefaultValue=0x00000000
T0G0Cmos3Name=nForce SPP --> MCP
T0G0Cmos3Value=1X|N/A|2X|N/A|3X|4X|5X
T0G0Cmos3Location=0x53
T0G0Cmos3BitMask=0x07
T0G0Cmos3DefaultValue=0x00000006
T0G0Cmos4Name=nForce SPP <-- MCP
T0G0Cmos4Value=1X|N/A|2X|N/A|3X|4X|5X
T0G0Cmos4Location=0x53
T0G0Cmos4BitMask=0x38
T0G0Cmos4DefaultValue=0x00000006
T0G0Cmos5Name=CPU N/2 Ratio
T0G0Cmos5Value=Enabled|Disabled
T0G0Cmos5Location=0x4B
T0G0Cmos5BitMask=0x01
T0G0Cmos5DefaultValue=0x00000000
REM T0Group 1
T0Group1Name=FSB & Memory Config
T0G1CmosFieldNo=5
T0G1Cmos0Name=SLI-Ready Memory
T0G1Cmos0Value=Disabled|CPUOC 0%|CPUOC 1%|CPUOC 2%|CPUOC 3%|CPUOC 4%|CPUOC 5%|
T0G1Cmos0Value0=CPUOC MAX|Expert
T0G1Cmos0Location=0x52
T0G1Cmos0BitMask=0x1E
T0G1Cmos0Control=CMOS_LOC|0xB0|0x01
T0G1Cmos0CtrlValue=VAL_LIST|0x01
T0G1Cmos0DefaultValue=0x00000000
T0G1Cmos1Name=FSB - Memory Clock Mode
T0G1Cmos1Value=Auto|Linked|Unlinked
T0G1Cmos1Location=0x37
T0G1Cmos1BitMask=0xC0
T0G1Cmos1Control=T0G1Cmos0|NO_GRAY_GRAY
T0G1Cmos1CtrlValue=Disabled|Expert
T0G1Cmos1DefaultValue=0x00000000
T0G1Cmos2Name=FSB - Memory Ratio
T0G1Cmos2Value=Auto|5:4|3:2|Sync Mode
T0G1Cmos2Location=0x5F
T0G1Cmos2BitMask=0x07
T0G1Cmos2Control=T0G1Cmos1
T0G1Cmos2CtrlValue=Linked
T0G1Cmos2DefaultValue=0x00000000
T0G1Cmos3Name=FSB (QDR), MHz
T0G1Cmos3Value=N/A-400|400|...|2000|1
T0G1Cmos3Location=0x34
T0G1Cmos3BitMask=0xFFF
T0G1Cmos3Control=T0G1Cmos1
T0G1Cmos3CtrlValue=UnLinked|Linked
T0G1Cmos3DefaultValue=0x00000000
T0G1Cmos4Name=MEM (DDR), MHz
T0G1Cmos4Value=N/A-400|400|...|2000|1
T0G1Cmos4Location=0x38
T0G1Cmos4BitMask=0xFFF
T0G1Cmos4Control=T0G1Cmos1
T0G1Cmos4CtrlValue=UnLinked
T0G1Cmos4DefaultValue=0x00000000
REM T0Group 2
T0Group2Name=Memory Timing Setting I
T0G2CmosFieldNo=6
T0G2Cmos0Name=Memory Timing Mode
T0G2Cmos0Value=Optimal|Expert
T0G2Cmos0Location=0x35
T0G2Cmos0BitMask=0x80
T0G2Cmos0DefaultValue=0x00000000
T0G2Cmos1Name=tCL (CAS Latency)
T0G2Cmos1Value=Auto|1|2|3|4|5|6
T0G2Cmos1Location=0x35
T0G2Cmos1BitMask=0x70
T0G2Cmos1Control=T0G2Cmos0
T0G2Cmos1CtrlValue=Expert
T0G2Cmos1DefaultValue=0x00000000
T0G2Cmos2Name=tRCD
T0G2Cmos2Value=Auto|1|2|3|4|5|6|7
T0G2Cmos2Location=0x3C
T0G2Cmos2BitMask=0x07
T0G2Cmos2Control=T0G2Cmos0
T0G2Cmos2CtrlValue=Expert
T0G2Cmos2DefaultValue=0x00000000
T0G2Cmos3Name=tRP
T0G2Cmos3Value=Auto|1|2|3|4|5|6|7
T0G2Cmos3Location=0x39
T0G2Cmos3BitMask=0x70
T0G2Cmos3Control=T0G2Cmos0
T0G2Cmos3CtrlValue=Expert
T0G2Cmos3DefaultValue=0x00000000
T0G2Cmos4Name=tRAS
T0G2Cmos4Value=Auto|1|2|3|4|5|6|7|8|9|10|11|12|13|14|15|
T0G2Cmos4Value0=16|17|18|19|20|21|22|23|24|25|26|27|28|29|30|31
T0G2Cmos4Location=0x33
T0G2Cmos4BitMask=0x1F
T0G2Cmos4Control=T0G2Cmos0
T0G2Cmos4CtrlValue=Expert
T0G2Cmos4DefaultValue=0x00000000
T0G2Cmos5Name=Command Per Clock (CMD)
T0G2Cmos5Value=Auto|1T|2T
T0G2Cmos5Location=0x3A
T0G2Cmos5BitMask=0x60
T0G2Cmos5Control=T0G2Cmos0
T0G2Cmos5CtrlValue=Expert
T0G2Cmos5DefaultValue=0x00000000
REM T0Group 3
T0Group3Name=Memory Timing Setting II
T0G3CmosFieldNo=5
T0G3Cmos0Name=tRRD
T0G3Cmos0Value=Auto|1|2|3|4|5|6|7|8|9|10|11|12|13|14|15
T0G3Cmos0Location=0x9D
T0G3Cmos0BitMask=0x0F
T0G3Cmos0Control=T0G2Cmos0
T0G3Cmos0CtrlValue=Expert
T0G3Cmos0DefaultValue=0x00000000
T0G3Cmos1Name=tRC
T0G3Cmos1Value=Auto|1|2|3|4|5|6|7|8|9|10|11|12|13|14|15|
T0G3Cmos1Value0=16|17|18|19|20|21|22|23|24|25|26|27|28|29|30|31
T0G3Cmos1Location=0x4F
T0G3Cmos1BitMask=0xF8
T0G3Cmos1Control=T0G2Cmos0
T0G3Cmos1CtrlValue=Expert
T0G3Cmos1DefaultValue=0x00000000
T0G3Cmos2Name=tWR
T0G3Cmos2Value=Auto|1|2|3|4|5|6|N/A
T0G3Cmos2Location=0x98
T0G3Cmos2BitMask=0x0F
T0G3Cmos2Control=T0G2Cmos0
T0G3Cmos2CtrlValue=Expert
T0G3Cmos2DefaultValue=0x00000000
T0G3Cmos3Name=tWTR
T0G3Cmos3Value=Auto|1|2|3|4|5|6|7|8|9|10|11|12|13|14|15
T0G3Cmos3Location=0x98
T0G3Cmos3BitMask=0xF0
T0G3Cmos3Control=T0G2Cmos0
T0G3Cmos3CtrlValue=Expert
T0G3Cmos3DefaultValue=0x00000000
T0G3Cmos4Name=tREF
T0G3Cmos4Value=Auto|7.8us|3.9us
T0G3Cmos4Location=0x9D
T0G3Cmos4BitMask=0x30
T0G3Cmos4Control=T0G2Cmos0
T0G3Cmos4CtrlValue=Expert
T0G3Cmos4DefaultValue=0x00000000
REM Tab 1
T1Name=Advanced Chipset Features II
T1GroupNo=3
REM T1Group 0
T1Group0Name=System Clocks II
T1G0CmosFieldNo=4
T1G0Cmos0Name=CPU Spread Spectrum
T1G0Cmos0Value=Disabled|Center Spread
T1G0Cmos0Location=0x36
T1G0Cmos0BitMask=0x01
T1G0Cmos0DefaultValue=0x00000001
T1G0Cmos1Name=HT Spread Spectrum
T1G0Cmos1Value=Auto|Disabled|N/A|N/A
T1G0Cmos1Location=0x36
T1G0Cmos1BitMask=0x60
T1G0Cmos1DefaultValue=0x00000000
T1G0Cmos2Name=PCIe Spread Spectrum (MCP)
T1G0Cmos2Value=Auto|Disabled
T1G0Cmos2Location=0x36
T1G0Cmos2BitMask=0x08
T1G0Cmos2DefaultValue=0x00000000
T1G0Cmos3Name=SATA Spread Spectrum
T1G0Cmos3Value=Disabled|Down Spread
T1G0Cmos3Location=0x36
T1G0Cmos3BitMask=0x10
T1G0Cmos3DefaultValue=0x00000000
REM T1Group 1
T1Group1Name=System Voltages I
T1G1CmosFieldNo=6
T1G1Cmos0Name=CPU Core
T1G1Cmos0Value=Auto|1.80000V|1.78750V|1.77500V|1.76250V|1.75000V|
T1G1Cmos0Value0=1.73750V|1.72500V|1.71250V|1.70000V|1.68750V|1.67500V|
T1G1Cmos0Value1=1.66250V|1.65000V|1.63750V|1.62500V|1.61250V|1.60000V|
T1G1Cmos0Value2=1.59375V|1.58750V|1.58125V|1.57500V|1.56875V|1.56250V|
T1G1Cmos0Value3=1.55625V|1.55000V|1.54375V|1.53750V|1.53125V|1.52500V|
T1G1Cmos0Value4=1.51875V|1.51250V|1.50625V|1.50000V|1.49375V|1.48750V|
T1G1Cmos0Value5=1.48125V|1.47500V|1.46875V|1.46250V|1.45625V|1.45000V|
T1G1Cmos0Value6=1.44375V|1.43750V|1.43125V|1.42500V|1.41875V|1.41250V|
T1G1Cmos0Value7=1.40625V|1.40000V|1.39375V|1.38750V|1.38125V|1.37500V|
T1G1Cmos0Value8=1.36875V|1.36250V|1.35625V|1.35000V|1.34375V|1.33750V|
T1G1Cmos0Value9=1.33125V|1.32500V|1.31875V|1.31250V|1.30625V|1.30000V|
T1G1Cmos0Value10=1.29375V|1.28750V|1.28125V|1.27500V|1.26875V|1.26250V|
T1G1Cmos0Value11=1.25625V|1.25000V|1.24375V|1.23750V|1.23125V|1.22500V|
T1G1Cmos0Value12=1.21875V|1.21250V|1.20625V|1.20000V|1.19375V|1.18750V|
T1G1Cmos0Value13=1.18125V|1.17500V|1.16875V|1.16250V|1.15625V|1.15000V|
T1G1Cmos0Value14=1.14375V|1.13750V|1.13125V|1.12500V|1.11875V|1.11250V|
T1G1Cmos0Value15=1.10625V|1.10000V|1.09375V|1.08750V|1.08125V|1.07500V|
T1G1Cmos0Value16=1.06875V|1.06250V|1.05625V|1.05000V|1.04375V|1.03750V|
T1G1Cmos0Value17=1.03125V|1.02500V|1.01875V|1.01250V|1.00625V|1.00000V|
T1G1Cmos0Value18=0.99375V|0.98750V|0.98125V|0.97500V|0.96875V|0.96250V|
T1G1Cmos0Value19=0.95625V|0.95000V|0.94375V|0.93750V|0.93125V|0.92500V|
T1G1Cmos0Value20=0.91875V|0.91250V|0.90625V|0.90000V|0.89375V|0.88750V|
T1G1Cmos0Value21=0.88125V|0.87500V|0.86875V|0.86250V|0.85625V|0.85000V|
T1G1Cmos0Value22=0.84375V|0.83750V|0.83125V|0.82500V|0.81875V|0.81250V|
T1G1Cmos0Value23=0.80625V|0.80000V|0.79375V|0.78750V|0.78125V|0.77500V|
T1G1Cmos0Value24=0.76875V|0.76250V|0.75625V|0.75000V|0.74375V|0.73750V|
T1G1Cmos0Value25=0.73125V|0.72500V|0.71875V|0.71250V|0.70625V|0.70000V|
T1G1Cmos0Value26=0.69375V|0.68750V|0.68125V|0.67500V|0.66875V|0.66250V|
T1G1Cmos0Value27=0.65625V|0.65000V|0.64375V|0.63750V|0.63125V|0.62500V|
T1G1Cmos0Value28=0.61875V|0.61250V|0.60625V|0.60000V|0.59375V|0.58750V|
T1G1Cmos0Value29=0.58125V|0.57500V|0.56875V|0.56250V|0.55625V|0.55000V|
T1G1Cmos0Value30=0.54375V|0.53750V|0.53125V|0.52500V|0.51875V|0.51250V|
T1G1Cmos0Value31=0.50625V|0.50000V
T1G1Cmos0Location=0xB3
T1G1Cmos0BitMask=0xFF
T1G1Cmos0DefaultValue=0x00000000
T1G1Cmos1Name=CPU FSB
T1G1Cmos1Value=Auto|1.2V|1.3V|1.4V|1.5V
T1G1Cmos1Location=0xC7
T1G1Cmos1BitMask=0x0E0
T1G1Cmos1DefaultValue=0x00000000
T1G1Cmos2Name=Memory
T1G1Cmos2Value=Auto|1.800V|1.825V|1.850V|1.875V|1.900V|1.925V|1.950V|
T1G1Cmos2Value0=1.975V|2.000V|2.025V|2.050V|2.075V|2.100V|2.125V|2.150V|
T1G1Cmos2Value1=2.175V|2.200V|2.225V|2.250V|2.275V|2.300V|2.325V|2.350V|
T1G1Cmos2Value2=2.375V|2.400V|2.425V|2.450V|2.475V|2.500V
T1G1Cmos2Location=0xB0
T1G1Cmos2BitMask=0xF8
T1G1Cmos2DefaultValue=0x00000000
T1G1Cmos3Name=nForce SPP
T1G1Cmos3Value=Auto|1.20V|1.25V|1.30V|1.35V|1.40V|1.45V|1.50V|1.55V
T1G1Cmos3Location=0xB1
T1G1Cmos3BitMask=0x0F
T1G1Cmos3DefaultValue=0x00000000
T1G1Cmos4Name=nForce MCP
T1G1Cmos4Value=Auto|1.500V|1.525V|1.550V|1.575V|1.600V|
T1G1Cmos4Value0=1.625V|1.650V|1.675V|1.700V|1.725V|1.750V
T1G1Cmos4Location=0xB1
T1G1Cmos4BitMask=0xF0
T1G1Cmos4DefaultValue=0x00000000
T1G1Cmos5Name=HT nForce SPP <-> MCP
T1G1Cmos5Value=Auto|1.20V|1.25V|1.30V|1.35V|1.40V|1.45V|1.50V|1.55V
T1G1Cmos5Location=0xB2
T1G1Cmos5BitMask=0x3C
T1G1Cmos5DefaultValue=0x00000000
REM T1Group 2
T1Group2Name=System Voltages II
T1G2CmosFieldNo=4
T1G2Cmos0Name=GTLVREF Lane 0
T1G2Cmos0Value=Auto|+00mv|+05mv|+10mv|+15mv|+20mv|+25mv|+30mv|+35mv|
T1G2Cmos0Value0=+40mv|+45mv|+50mv|+55mv|+60mv|+65mv|+70mv|+75mv|+80mv|
T1G2Cmos0Value1=+85mv|+90mv|+95mv|+100mv|+105mv|+110mv|+115mv|+120mv|
T1G2Cmos0Value2=+125mv|+130mv|+135mv|+140mv|+145mv|+150mv|+155mv|+160mv
T1G2Cmos0Location=0xAC
T1G2Cmos0BitMask=0x3F
T1G2Cmos0DefaultValue=0x00000000
T1G2Cmos1Name=GTLVREF Lane 1
T1G2Cmos1Value=Auto|+00mv|+05mv|+10mv|+15mv|+20mv|+25mv|+30mv|+35mv|
T1G2Cmos1Value0=+40mv|+45mv|+50mv|+55mv|+60mv|+65mv|+70mv|+75mv|+80mv|
T1G2Cmos1Value1=+85mv|+90mv|+95mv|+100mv|+105mv|+110mv|+115mv|+120mv|
T1G2Cmos1Value2=+125mv|+130mv|+135mv|+140mv|+145mv|+150mv|+155mv|+160mv
T1G2Cmos1Location=0xAD
T1G2Cmos1BitMask=0x3F
T1G2Cmos1DefaultValue=0x00000000
T1G2Cmos2Name=GTLVREF Lane 2
T1G2Cmos2Value=Auto|+00mv|+05mv|+10mv|+15mv|+20mv|+25mv|+30mv|+35mv|
T1G2Cmos2Value0=+40mv|+45mv|+50mv|+55mv|+60mv|+65mv|+70mv|+75mv|+80mv|
T1G2Cmos2Value1=+85mv|+90mv|+95mv|+100mv|+105mv|+110mv|+115mv|+120mv|
T1G2Cmos2Value2=+125mv|+130mv|+135mv|+140mv|+145mv|+150mv|+155mv|+160mv
T1G2Cmos2Location=0xAE
T1G2Cmos2BitMask=0x3F
T1G2Cmos2DefaultValue=0x00000000
T1G2Cmos3Name=GTLVREF Lane 3
T1G2Cmos3Value=Auto|+00mv|+05mv|+10mv|+15mv|+20mv|+25mv|+30mv|+35mv|
T1G2Cmos3Value0=+40mv|+45mv|+50mv|+55mv|+60mv|+65mv|+70mv|+75mv|+80mv|
T1G2Cmos3Value1=+85mv|+90mv|+95mv|+100mv|+105mv|+110mv|+115mv|+120mv|
T1G2Cmos3Value2=+125mv|+130mv|+135mv|+140mv|+145mv|+150mv|+155mv|+160mv
T1G2Cmos3Location=0xAF
T1G2Cmos3BitMask=0x3F
T1G2Cmos3DefaultValue=0x00000000
REM Tab 2
T2Name=Advanced Chipset Features III
T2GroupNo=2
REM T2Group 0
T2Group0Name=CPU Configuration I
T2G0CmosFieldNo=4
T2G0Cmos0Name=CPU Core 0
T2G0Cmos0Value=Enabled|N/A
T2G0Cmos0Location=0xFD
T2G0Cmos0BitMask=0x01
T2G0Cmos0DefaultValue=0x80000000
T2G0Cmos1Name=CPU Core 1
T2G0Cmos1Value=Disabled|Enabled
T2G0Cmos1Location=0x47
T2G0Cmos1BitMask=0x20
T2G0Cmos1DefaultValue=0x00000001
T2G0Cmos2Name=CPU Core 2
T2G0Cmos2Value=Disabled|Enabled
T2G0Cmos2Location=0x47
T2G0Cmos2BitMask=0x40
T2G0Cmos2DefaultValue=0x00000001
T2G0Cmos3Name=CPU Core 3
T2G0Cmos3Value=Disabled|Enabled
T2G0Cmos3Location=0x47
T2G0Cmos3BitMask=0x80
T2G0Cmos3DefaultValue=0x00000001
REM T2Group 1
T2Group1Name=CPU Configuration II
T2G1CmosFieldNo=6
T2G1Cmos0Name=Limit CPUID MaxVal
T2G1Cmos0Value=Disabled|Enabled
T2G1Cmos0Location=0x44
T2G1Cmos0BitMask=0x04
T2G1Cmos0DefaultValue=0x00000000
T2G1Cmos1Name=Intel SpeedStep
T2G1Cmos1Value=Auto|Disabled
T2G1Cmos1Location=0x64
T2G1Cmos1BitMask=0x02
T2G1Cmos1DefaultValue=0x00000001
T2G1Cmos2Name=CPU Thermal Control
T2G1Cmos2Value=Disabled|TM1 only|TM2 only|TM1 & TM2
T2G1Cmos2Location=0x64
T2G1Cmos2BitMask=0x0C
T2G1Cmos2DefaultValue=0x00000000
T2G1Cmos3Name=C1E Enhanced Halt State
T2G1Cmos3Value=Enabled|Disabled
T2G1Cmos3Location=0x64
T2G1Cmos3BitMask=0x01
T2G1Cmos3DefaultValue=0x00000000
T2G1Cmos4Name=Execute Disable Bit
T2G1Cmos4Value=Enabled|Disabled
T2G1Cmos4Location=0x44
T2G1Cmos4BitMask=0x08
T2G1Cmos4DefaultValue=0x00000000
T2G1Cmos5Name=Virtualization Technology
T2G1Cmos5Value=Enabled|Disabled
T2G1Cmos5Location=0x44
T2G1Cmos5BitMask=0x10
T2G1Cmos5DefaultValue=0x00000000
#nvsuoem.ini_end - End signature. Required.